1 | /* This file is part of the GNU C Library. |
2 | Copyright (C) 2008-2019 Free Software Foundation, Inc. |
3 | |
4 | The GNU C Library is free software; you can redistribute it and/or |
5 | modify it under the terms of the GNU Lesser General Public |
6 | License as published by the Free Software Foundation; either |
7 | version 2.1 of the License, or (at your option) any later version. |
8 | |
9 | The GNU C Library is distributed in the hope that it will be useful, |
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
12 | Lesser General Public License for more details. |
13 | |
14 | You should have received a copy of the GNU Lesser General Public |
15 | License along with the GNU C Library; if not, see |
16 | <http://www.gnu.org/licenses/>. */ |
17 | |
18 | #ifndef cpu_features_h |
19 | #define cpu_features_h |
20 | |
21 | enum |
22 | { |
23 | /* The integer bit array index for the first set of internal feature |
24 | bits. */ |
25 | FEATURE_INDEX_1 = 0, |
26 | FEATURE_INDEX_2, |
27 | /* The current maximum size of the feature integer bit array. */ |
28 | FEATURE_INDEX_MAX |
29 | }; |
30 | |
31 | enum |
32 | { |
33 | COMMON_CPUID_INDEX_1 = 0, |
34 | COMMON_CPUID_INDEX_7, |
35 | COMMON_CPUID_INDEX_80000001, |
36 | COMMON_CPUID_INDEX_D_ECX_1, |
37 | COMMON_CPUID_INDEX_80000007, |
38 | COMMON_CPUID_INDEX_80000008, |
39 | /* Keep the following line at the end. */ |
40 | COMMON_CPUID_INDEX_MAX |
41 | }; |
42 | |
43 | struct cpuid_registers |
44 | { |
45 | unsigned int eax; |
46 | unsigned int ebx; |
47 | unsigned int ecx; |
48 | unsigned int edx; |
49 | }; |
50 | |
51 | enum cpu_features_kind |
52 | { |
53 | arch_kind_unknown = 0, |
54 | arch_kind_intel, |
55 | arch_kind_amd, |
56 | arch_kind_other |
57 | }; |
58 | |
59 | struct cpu_features_basic |
60 | { |
61 | enum cpu_features_kind kind; |
62 | int max_cpuid; |
63 | unsigned int family; |
64 | unsigned int model; |
65 | unsigned int stepping; |
66 | }; |
67 | |
68 | struct cpu_features |
69 | { |
70 | struct cpuid_registers cpuid[COMMON_CPUID_INDEX_MAX]; |
71 | unsigned int feature[FEATURE_INDEX_MAX]; |
72 | struct cpu_features_basic basic; |
73 | /* The state size for XSAVEC or XSAVE. The type must be unsigned long |
74 | int so that we use |
75 | |
76 | sub xsave_state_size_offset(%rip) %RSP_LP |
77 | |
78 | in _dl_runtime_resolve. */ |
79 | unsigned long int xsave_state_size; |
80 | /* The full state size for XSAVE when XSAVEC is disabled by |
81 | |
82 | GLIBC_TUNABLES=glibc.cpu.hwcaps=-XSAVEC_Usable |
83 | */ |
84 | unsigned int xsave_state_full_size; |
85 | /* Data cache size for use in memory and string routines, typically |
86 | L1 size. */ |
87 | unsigned long int data_cache_size; |
88 | /* Shared cache size for use in memory and string routines, typically |
89 | L2 or L3 size. */ |
90 | unsigned long int shared_cache_size; |
91 | /* Threshold to use non temporal store. */ |
92 | unsigned long int non_temporal_threshold; |
93 | }; |
94 | |
95 | /* Used from outside of glibc to get access to the CPU features |
96 | structure. */ |
97 | extern const struct cpu_features *__get_cpu_features (void) |
98 | __attribute__ ((const)); |
99 | |
100 | /* Only used directly in cpu-features.c. */ |
101 | # define CPU_FEATURES_CPU_P(ptr, name) \ |
102 | ((ptr->cpuid[index_cpu_##name].reg_##name & (bit_cpu_##name)) != 0) |
103 | # define CPU_FEATURES_ARCH_P(ptr, name) \ |
104 | ((ptr->feature[index_arch_##name] & (bit_arch_##name)) != 0) |
105 | |
106 | /* HAS_CPU_FEATURE evaluates to true if CPU supports the feature. */ |
107 | #define HAS_CPU_FEATURE(name) \ |
108 | CPU_FEATURES_CPU_P (__get_cpu_features (), name) |
109 | /* HAS_ARCH_FEATURE evaluates to true if we may use the feature at |
110 | runtime. */ |
111 | # define HAS_ARCH_FEATURE(name) \ |
112 | CPU_FEATURES_ARCH_P (__get_cpu_features (), name) |
113 | /* CPU_FEATURE_USABLE evaluates to true if the feature is usable. */ |
114 | #define CPU_FEATURE_USABLE(name) \ |
115 | ((need_arch_feature_##name && HAS_ARCH_FEATURE (name##_Usable)) \ |
116 | || (!need_arch_feature_##name && HAS_CPU_FEATURE(name))) |
117 | |
118 | /* Architecture features. */ |
119 | |
120 | /* FEATURE_INDEX_1. */ |
121 | #define bit_arch_AVX_Usable (1u << 0) |
122 | #define bit_arch_AVX2_Usable (1u << 1) |
123 | #define bit_arch_AVX512F_Usable (1u << 2) |
124 | #define bit_arch_AVX512CD_Usable (1u << 3) |
125 | #define bit_arch_AVX512ER_Usable (1u << 4) |
126 | #define bit_arch_AVX512PF_Usable (1u << 5) |
127 | #define bit_arch_AVX512VL_Usable (1u << 6) |
128 | #define bit_arch_AVX512DQ_Usable (1u << 7) |
129 | #define bit_arch_AVX512BW_Usable (1u << 8) |
130 | #define bit_arch_AVX512_4FMAPS_Usable (1u << 9) |
131 | #define bit_arch_AVX512_4VNNIW_Usable (1u << 10) |
132 | #define bit_arch_AVX512_BITALG_Usable (1u << 11) |
133 | #define bit_arch_AVX512_IFMA_Usable (1u << 12) |
134 | #define bit_arch_AVX512_VBMI_Usable (1u << 13) |
135 | #define bit_arch_AVX512_VBMI2_Usable (1u << 14) |
136 | #define bit_arch_AVX512_VNNI_Usable (1u << 15) |
137 | #define bit_arch_AVX512_VPOPCNTDQ_Usable (1u << 16) |
138 | #define bit_arch_FMA_Usable (1u << 17) |
139 | #define bit_arch_FMA4_Usable (1u << 18) |
140 | #define bit_arch_VAES_Usable (1u << 19) |
141 | #define bit_arch_VPCLMULQDQ_Usable (1u << 20) |
142 | #define bit_arch_XOP_Usable (1u << 21) |
143 | #define bit_arch_XSAVEC_Usable (1u << 22) |
144 | |
145 | #define index_arch_AVX_Usable FEATURE_INDEX_1 |
146 | #define index_arch_AVX2_Usable FEATURE_INDEX_1 |
147 | #define index_arch_AVX512F_Usable FEATURE_INDEX_1 |
148 | #define index_arch_AVX512CD_Usable FEATURE_INDEX_1 |
149 | #define index_arch_AVX512ER_Usable FEATURE_INDEX_1 |
150 | #define index_arch_AVX512PF_Usable FEATURE_INDEX_1 |
151 | #define index_arch_AVX512VL_Usable FEATURE_INDEX_1 |
152 | #define index_arch_AVX512BW_Usable FEATURE_INDEX_1 |
153 | #define index_arch_AVX512DQ_Usable FEATURE_INDEX_1 |
154 | #define index_arch_AVX512_4FMAPS_Usable FEATURE_INDEX_1 |
155 | #define index_arch_AVX512_4VNNIW_Usable FEATURE_INDEX_1 |
156 | #define index_arch_AVX512_BITALG_Usable FEATURE_INDEX_1 |
157 | #define index_arch_AVX512_IFMA_Usable FEATURE_INDEX_1 |
158 | #define index_arch_AVX512_VBMI_Usable FEATURE_INDEX_1 |
159 | #define index_arch_AVX512_VBMI2_Usable FEATURE_INDEX_1 |
160 | #define index_arch_AVX512_VNNI_Usable FEATURE_INDEX_1 |
161 | #define index_arch_AVX512_VPOPCNTDQ_Usable FEATURE_INDEX_1 |
162 | #define index_arch_FMA_Usable FEATURE_INDEX_1 |
163 | #define index_arch_FMA4_Usable FEATURE_INDEX_1 |
164 | #define index_arch_VAES_Usable FEATURE_INDEX_1 |
165 | #define index_arch_VPCLMULQDQ_Usable FEATURE_INDEX_1 |
166 | #define index_arch_XOP_Usable FEATURE_INDEX_1 |
167 | #define index_arch_XSAVEC_Usable FEATURE_INDEX_1 |
168 | |
169 | /* Unused. Compiler will optimize them out. */ |
170 | #define bit_arch_SSE3_Usable (1u << 0) |
171 | #define bit_arch_PCLMULQDQ_Usable (1u << 0) |
172 | #define bit_arch_SSSE3_Usable (1u << 0) |
173 | #define bit_arch_CMPXCHG16B_Usable (1u << 0) |
174 | #define bit_arch_SSE4_1_Usable (1u << 0) |
175 | #define bit_arch_SSE4_2_Usable (1u << 0) |
176 | #define bit_arch_MOVBE_Usable (1u << 0) |
177 | #define bit_arch_POPCNT_Usable (1u << 0) |
178 | #define bit_arch_AES_Usable (1u << 0) |
179 | #define bit_arch_XSAVE_Usable (1u << 0) |
180 | #define bit_arch_OSXSAVE_Usable (1u << 0) |
181 | #define bit_arch_F16C_Usable (1u << 0) |
182 | #define bit_arch_RDRAND_Usable (1u << 0) |
183 | #define bit_arch_FPU_Usable (1u << 0) |
184 | #define bit_arch_TSC_Usable (1u << 0) |
185 | #define bit_arch_MSR_Usable (1u << 0) |
186 | #define bit_arch_CX8_Usable (1u << 0) |
187 | #define bit_arch_SEP_Usable (1u << 0) |
188 | #define bit_arch_CMOV_Usable (1u << 0) |
189 | #define bit_arch_CLFSH_Usable (1u << 0) |
190 | #define bit_arch_MMX_Usable (1u << 0) |
191 | #define bit_arch_FXSR_Usable (1u << 0) |
192 | #define bit_arch_SSE_Usable (1u << 0) |
193 | #define bit_arch_SSE2_Usable (1u << 0) |
194 | #define bit_arch_FSGSBASE_Usable (1u << 0) |
195 | #define bit_arch_BMI1_Usable (1u << 0) |
196 | #define bit_arch_HLE_Usable (1u << 0) |
197 | #define bit_arch_BMI2_Usable (1u << 0) |
198 | #define bit_arch_ERMS_Usable (1u << 0) |
199 | #define bit_arch_RTM_Usable (1u << 0) |
200 | #define bit_arch_RDSEED_Usable (1u << 0) |
201 | #define bit_arch_ADX_Usable (1u << 0) |
202 | #define bit_arch_CLFLUSHOPT_Usable (1u << 0) |
203 | #define bit_arch_CLWB_Usable (1u << 0) |
204 | #define bit_arch_SHA_Usable (1u << 0) |
205 | #define bit_arch_PREFETCHWT1_Usable (1u << 0) |
206 | #define bit_arch_GFNI_Usable (1u << 0) |
207 | #define bit_arch_RDPID_Usable (1u << 0) |
208 | #define bit_arch_CLDEMOTE_Usable (1u << 0) |
209 | #define bit_arch_MOVDIRI_Usable (1u << 0) |
210 | #define bit_arch_MOVDIR64B_Usable (1u << 0) |
211 | #define bit_arch_FSRM_Usable (1u << 0) |
212 | #define bit_arch_LAHF64_SAHF64_Usable (1u << 0) |
213 | #define bit_arch_SVM_Usable (1u << 0) |
214 | #define bit_arch_LZCNT_Usable (1u << 0) |
215 | #define bit_arch_SSE4A_Usable (1u << 0) |
216 | #define bit_arch_PREFETCHW_Usable (1u << 0) |
217 | #define bit_arch_TBM_Usable (1u << 0) |
218 | #define bit_arch_SYSCALL_SYSRET_Usable (1u << 0) |
219 | #define bit_arch_RDTSCP_Usable (1u << 0) |
220 | #define bit_arch_XSAVEOPT_Usable (1u << 0) |
221 | #define bit_arch_XGETBV_ECX_1_Usable (1u << 0) |
222 | #define bit_arch_XSAVES_Usable (1u << 0) |
223 | #define bit_arch_INVARIANT_TSC_Usable (1u << 0) |
224 | #define bit_arch_WBNOINVD_Usable (1u << 0) |
225 | |
226 | /* Unused. Compiler will optimize them out. */ |
227 | #define index_arch_SSE3_Usable FEATURE_INDEX_1 |
228 | #define index_arch_PCLMULQDQ_Usable FEATURE_INDEX_1 |
229 | #define index_arch_SSSE3_Usable FEATURE_INDEX_1 |
230 | #define index_arch_CMPXCHG16B_Usable FEATURE_INDEX_1 |
231 | #define index_arch_SSE4_1_Usable FEATURE_INDEX_1 |
232 | #define index_arch_SSE4_2_Usable FEATURE_INDEX_1 |
233 | #define index_arch_MOVBE_Usable FEATURE_INDEX_1 |
234 | #define index_arch_POPCNT_Usable FEATURE_INDEX_1 |
235 | #define index_arch_AES_Usable FEATURE_INDEX_1 |
236 | #define index_arch_XSAVE_Usable FEATURE_INDEX_1 |
237 | #define index_arch_OSXSAVE_Usable FEATURE_INDEX_1 |
238 | #define index_arch_F16C_Usable FEATURE_INDEX_1 |
239 | #define index_arch_RDRAND_Usable FEATURE_INDEX_1 |
240 | #define index_arch_FPU_Usable FEATURE_INDEX_1 |
241 | #define index_arch_TSC_Usable FEATURE_INDEX_1 |
242 | #define index_arch_MSR_Usable FEATURE_INDEX_1 |
243 | #define index_arch_CX8_Usable FEATURE_INDEX_1 |
244 | #define index_arch_SEP_Usable FEATURE_INDEX_1 |
245 | #define index_arch_CMOV_Usable FEATURE_INDEX_1 |
246 | #define index_arch_CLFSH_Usable FEATURE_INDEX_1 |
247 | #define index_arch_MMX_Usable FEATURE_INDEX_1 |
248 | #define index_arch_FXSR_Usable FEATURE_INDEX_1 |
249 | #define index_arch_SSE_Usable FEATURE_INDEX_1 |
250 | #define index_arch_SSE2_Usable FEATURE_INDEX_1 |
251 | #define index_arch_FSGSBASE_Usable FEATURE_INDEX_1 |
252 | #define index_arch_BMI1_Usable FEATURE_INDEX_1 |
253 | #define index_arch_HLE_Usable FEATURE_INDEX_1 |
254 | #define index_arch_BMI2_Usable FEATURE_INDEX_1 |
255 | #define index_arch_ERMS_Usable FEATURE_INDEX_1 |
256 | #define index_arch_RTM_Usable FEATURE_INDEX_1 |
257 | #define index_arch_RDSEED_Usable FEATURE_INDEX_1 |
258 | #define index_arch_ADX_Usable FEATURE_INDEX_1 |
259 | #define index_arch_CLFLUSHOPT_Usable FEATURE_INDEX_1 |
260 | #define index_arch_CLWB_Usable FEATURE_INDEX_1 |
261 | #define index_arch_SHA_Usable FEATURE_INDEX_1 |
262 | #define index_arch_PREFETCHWT1_Usable FEATURE_INDEX_1 |
263 | #define index_arch_GFNI_Usable FEATURE_INDEX_1 |
264 | #define index_arch_RDPID_Usable FEATURE_INDEX_1 |
265 | #define index_arch_CLDEMOTE_Usable FEATURE_INDEX_1 |
266 | #define index_arch_MOVDIRI_Usable FEATURE_INDEX_1 |
267 | #define index_arch_MOVDIR64B_Usable FEATURE_INDEX_1 |
268 | #define index_arch_FSRM_Usable FEATURE_INDEX_1 |
269 | #define index_arch_LAHF64_SAHF64_Usable FEATURE_INDEX_1 |
270 | #define index_arch_LZCNT_Usable FEATURE_INDEX_1 |
271 | #define index_arch_SSE4A_Usable FEATURE_INDEX_1 |
272 | #define index_arch_PREFETCHW_Usable FEATURE_INDEX_1 |
273 | #define index_arch_TBM_Usable FEATURE_INDEX_1 |
274 | #define index_arch_SYSCALL_SYSRET_Usable FEATURE_INDEX_1 |
275 | #define index_arch_RDTSCP_Usable FEATURE_INDEX_1 |
276 | #define index_arch_XSAVEOPT_Usable FEATURE_INDEX_1 |
277 | #define index_arch_XGETBV_ECX_1_Usable FEATURE_INDEX_1 |
278 | #define index_arch_XSAVES_Usable FEATURE_INDEX_1 |
279 | #define index_arch_INVARIANT_TSC_Usable FEATURE_INDEX_1 |
280 | #define index_arch_WBNOINVD_Usable FEATURE_INDEX_1 |
281 | |
282 | /* COMMON_CPUID_INDEX_1. */ |
283 | |
284 | /* ECX. */ |
285 | #define need_arch_feature_SSE3 0 |
286 | #define need_arch_feature_PCLMULQDQ 0 |
287 | #define need_arch_feature_SSSE3 0 |
288 | #define need_arch_feature_FMA 1 |
289 | #define need_arch_feature_CMPXCHG16B 0 |
290 | #define need_arch_feature_SSE4_1 0 |
291 | #define need_arch_feature_SSE4_2 0 |
292 | #define need_arch_feature_MOVBE 0 |
293 | #define need_arch_feature_POPCNT 0 |
294 | #define need_arch_feature_AES 0 |
295 | #define need_arch_feature_XSAVE 0 |
296 | #define need_arch_feature_OSXSAVE 0 |
297 | #define need_arch_feature_AVX 1 |
298 | #define need_arch_feature_F16C 0 |
299 | #define need_arch_feature_RDRAND 0 |
300 | |
301 | /* EDX. */ |
302 | #define need_arch_feature_FPU 0 |
303 | #define need_arch_feature_TSC 0 |
304 | #define need_arch_feature_MSR 0 |
305 | #define need_arch_feature_CX8 0 |
306 | #define need_arch_feature_SEP 0 |
307 | #define need_arch_feature_CMOV 0 |
308 | #define need_arch_feature_CLFSH 0 |
309 | #define need_arch_feature_MMX 0 |
310 | #define need_arch_feature_FXSR 0 |
311 | #define need_arch_feature_SSE 0 |
312 | #define need_arch_feature_SSE2 0 |
313 | |
314 | /* COMMON_CPUID_INDEX_7. */ |
315 | |
316 | /* EBX. */ |
317 | #define need_arch_feature_FSGSBASE 0 |
318 | #define need_arch_feature_BMI1 0 |
319 | #define need_arch_feature_HLE 0 |
320 | #define need_arch_feature_AVX2 1 |
321 | #define need_arch_feature_BMI2 0 |
322 | #define need_arch_feature_ERMS 0 |
323 | #define need_arch_feature_RTM 0 |
324 | #define need_arch_feature_AVX512F 1 |
325 | #define need_arch_feature_AVX512DQ 1 |
326 | #define need_arch_feature_RDSEED 0 |
327 | #define need_arch_feature_ADX 0 |
328 | #define need_arch_feature_AVX512_IFMA 1 |
329 | #define need_arch_feature_CLFLUSHOPT 0 |
330 | #define need_arch_feature_CLWB 0 |
331 | #define need_arch_feature_AVX512PF 1 |
332 | #define need_arch_feature_AVX512ER 1 |
333 | #define need_arch_feature_AVX512CD 1 |
334 | #define need_arch_feature_SHA 0 |
335 | #define need_arch_feature_AVX512BW 1 |
336 | #define need_arch_feature_AVX512VL 1 |
337 | |
338 | /* ECX. */ |
339 | #define need_arch_feature_PREFETCHWT1 0 |
340 | #define need_arch_feature_AVX512_VBMI 1 |
341 | #define need_arch_feature_AVX512_VBMI2 1 |
342 | #define need_arch_feature_GFNI 0 |
343 | #define need_arch_feature_VAES 1 |
344 | #define need_arch_feature_VPCLMULQDQ 1 |
345 | #define need_arch_feature_AVX512_VNNI 1 |
346 | #define need_arch_feature_AVX512_BITALG 1 |
347 | #define need_arch_feature_AVX512_VPOPCNTDQ 1 |
348 | #define need_arch_feature_RDPID 0 |
349 | #define need_arch_feature_CLDEMOTE 0 |
350 | #define need_arch_feature_MOVDIRI 0 |
351 | #define need_arch_feature_MOVDIR64B 0 |
352 | |
353 | /* EDX. */ |
354 | #define need_arch_feature_AVX512_4VNNIW 1 |
355 | #define need_arch_feature_AVX512_4FMAPS 1 |
356 | #define need_arch_feature_FSRM 0 |
357 | |
358 | /* COMMON_CPUID_INDEX_80000001. */ |
359 | |
360 | /* ECX. */ |
361 | #define need_arch_feature_LAHF64_SAHF64 0 |
362 | #define need_arch_feature_LZCNT 0 |
363 | #define need_arch_feature_SSE4A 0 |
364 | #define need_arch_feature_PREFETCHW 0 |
365 | #define need_arch_feature_XOP 1 |
366 | #define need_arch_feature_FMA4 1 |
367 | #define need_arch_feature_TBM 0 |
368 | #define need_arch_feature_SYSCALL_SYSRET 0 |
369 | #define need_arch_feature_RDTSCP 0 |
370 | #define need_arch_feature_XSAVEOPT 0 |
371 | #define need_arch_feature_XSAVEC 1 |
372 | #define need_arch_feature_XGETBV_ECX_1 0 |
373 | #define need_arch_feature_XSAVES 0 |
374 | #define need_arch_feature_INVARIANT_TSC 0 |
375 | #define need_arch_feature_WBNOINVD 0 |
376 | |
377 | /* CPU features. */ |
378 | |
379 | /* COMMON_CPUID_INDEX_1. */ |
380 | |
381 | /* ECX. */ |
382 | #define bit_cpu_SSE3 (1u << 0) |
383 | #define bit_cpu_PCLMULQDQ (1u << 1) |
384 | #define bit_cpu_DTES64 (1u << 2) |
385 | #define bit_cpu_MONITOR (1u << 3) |
386 | #define bit_cpu_DS_CPL (1u << 4) |
387 | #define bit_cpu_VMX (1u << 5) |
388 | #define bit_cpu_SMX (1u << 6) |
389 | #define bit_cpu_EST (1u << 7) |
390 | #define bit_cpu_TM2 (1u << 8) |
391 | #define bit_cpu_SSSE3 (1u << 9) |
392 | #define bit_cpu_CNXT_ID (1u << 10) |
393 | #define bit_cpu_SDBG (1u << 11) |
394 | #define bit_cpu_FMA (1u << 12) |
395 | #define bit_cpu_CMPXCHG16B (1u << 13) |
396 | #define bit_cpu_XTPRUPDCTRL (1u << 14) |
397 | #define bit_cpu_PDCM (1u << 15) |
398 | #define bit_cpu_PCID (1u << 17) |
399 | #define bit_cpu_DCA (1u << 18) |
400 | #define bit_cpu_SSE4_1 (1u << 19) |
401 | #define bit_cpu_SSE4_2 (1u << 20) |
402 | #define bit_cpu_X2APIC (1u << 21) |
403 | #define bit_cpu_MOVBE (1u << 22) |
404 | #define bit_cpu_POPCNT (1u << 23) |
405 | #define bit_cpu_TSC_DEADLINE (1u << 24) |
406 | #define bit_cpu_AES (1u << 25) |
407 | #define bit_cpu_XSAVE (1u << 26) |
408 | #define bit_cpu_OSXSAVE (1u << 27) |
409 | #define bit_cpu_AVX (1u << 28) |
410 | #define bit_cpu_F16C (1u << 29) |
411 | #define bit_cpu_RDRAND (1u << 30) |
412 | |
413 | /* EDX. */ |
414 | #define bit_cpu_FPU (1u << 0) |
415 | #define bit_cpu_VME (1u << 1) |
416 | #define bit_cpu_DE (1u << 2) |
417 | #define bit_cpu_PSE (1u << 3) |
418 | #define bit_cpu_TSC (1u << 4) |
419 | #define bit_cpu_MSR (1u << 5) |
420 | #define bit_cpu_PAE (1u << 6) |
421 | #define bit_cpu_MCE (1u << 7) |
422 | #define bit_cpu_CX8 (1u << 8) |
423 | #define bit_cpu_APIC (1u << 9) |
424 | #define bit_cpu_SEP (1u << 11) |
425 | #define bit_cpu_MTRR (1u << 12) |
426 | #define bit_cpu_PGE (1u << 13) |
427 | #define bit_cpu_MCA (1u << 14) |
428 | #define bit_cpu_CMOV (1u << 15) |
429 | #define bit_cpu_PAT (1u << 16) |
430 | #define bit_cpu_PSE_36 (1u << 17) |
431 | #define bit_cpu_PSN (1u << 18) |
432 | #define bit_cpu_CLFSH (1u << 20) |
433 | #define bit_cpu_DS (1u << 21) |
434 | #define bit_cpu_ACPI (1u << 22) |
435 | #define bit_cpu_MMX (1u << 23) |
436 | #define bit_cpu_FXSR (1u << 24) |
437 | #define bit_cpu_SSE (1u << 25) |
438 | #define bit_cpu_SSE2 (1u << 26) |
439 | #define bit_cpu_SS (1u << 27) |
440 | #define bit_cpu_HTT (1u << 28) |
441 | #define bit_cpu_TM (1u << 29) |
442 | #define bit_cpu_PBE (1u << 31) |
443 | |
444 | /* COMMON_CPUID_INDEX_7. */ |
445 | |
446 | /* EBX. */ |
447 | #define bit_cpu_FSGSBASE (1u << 0) |
448 | #define bit_cpu_TSC_ADJUST (1u << 1) |
449 | #define bit_cpu_SGX (1u << 2) |
450 | #define bit_cpu_BMI1 (1u << 3) |
451 | #define bit_cpu_HLE (1u << 4) |
452 | #define bit_cpu_AVX2 (1u << 5) |
453 | #define bit_cpu_SMEP (1u << 7) |
454 | #define bit_cpu_BMI2 (1u << 8) |
455 | #define bit_cpu_ERMS (1u << 9) |
456 | #define bit_cpu_INVPCID (1u << 10) |
457 | #define bit_cpu_RTM (1u << 11) |
458 | #define bit_cpu_PQM (1u << 12) |
459 | #define bit_cpu_MPX (1u << 14) |
460 | #define bit_cpu_PQE (1u << 15) |
461 | #define bit_cpu_AVX512F (1u << 16) |
462 | #define bit_cpu_AVX512DQ (1u << 17) |
463 | #define bit_cpu_RDSEED (1u << 18) |
464 | #define bit_cpu_ADX (1u << 19) |
465 | #define bit_cpu_SMAP (1u << 20) |
466 | #define bit_cpu_AVX512_IFMA (1u << 21) |
467 | #define bit_cpu_CLFLUSHOPT (1u << 22) |
468 | #define bit_cpu_CLWB (1u << 24) |
469 | #define bit_cpu_TRACE (1u << 25) |
470 | #define bit_cpu_AVX512PF (1u << 26) |
471 | #define bit_cpu_AVX512ER (1u << 27) |
472 | #define bit_cpu_AVX512CD (1u << 28) |
473 | #define bit_cpu_SHA (1u << 29) |
474 | #define bit_cpu_AVX512BW (1u << 30) |
475 | #define bit_cpu_AVX512VL (1u << 31) |
476 | |
477 | /* ECX. */ |
478 | #define bit_cpu_PREFETCHWT1 (1u << 0) |
479 | #define bit_cpu_AVX512_VBMI (1u << 1) |
480 | #define bit_cpu_UMIP (1u << 2) |
481 | #define bit_cpu_PKU (1u << 3) |
482 | #define bit_cpu_OSPKE (1u << 4) |
483 | #define bit_cpu_WAITPKG (1u << 5) |
484 | #define bit_cpu_AVX512_VBMI2 (1u << 6) |
485 | #define bit_cpu_SHSTK (1u << 7) |
486 | #define bit_cpu_GFNI (1u << 8) |
487 | #define bit_cpu_VAES (1u << 9) |
488 | #define bit_cpu_VPCLMULQDQ (1u << 10) |
489 | #define bit_cpu_AVX512_VNNI (1u << 11) |
490 | #define bit_cpu_AVX512_BITALG (1u << 12) |
491 | #define bit_cpu_AVX512_VPOPCNTDQ (1u << 14) |
492 | #define bit_cpu_RDPID (1u << 22) |
493 | #define bit_cpu_CLDEMOTE (1u << 25) |
494 | #define bit_cpu_MOVDIRI (1u << 27) |
495 | #define bit_cpu_MOVDIR64B (1u << 28) |
496 | #define bit_cpu_SGX_LC (1u << 30) |
497 | |
498 | /* EDX. */ |
499 | #define bit_cpu_AVX512_4VNNIW (1u << 2) |
500 | #define bit_cpu_AVX512_4FMAPS (1u << 3) |
501 | #define bit_cpu_FSRM (1u << 4) |
502 | #define bit_cpu_PCONFIG (1u << 18) |
503 | #define bit_cpu_IBT (1u << 20) |
504 | #define bit_cpu_IBRS_IBPB (1u << 26) |
505 | #define bit_cpu_STIBP (1u << 27) |
506 | #define bit_cpu_CAPABILITIES (1u << 29) |
507 | #define bit_cpu_SSBD (1u << 31) |
508 | |
509 | /* COMMON_CPUID_INDEX_80000001. */ |
510 | |
511 | /* ECX. */ |
512 | #define bit_cpu_LAHF64_SAHF64 (1u << 0) |
513 | #define bit_cpu_SVM (1u << 2) |
514 | #define bit_cpu_LZCNT (1u << 5) |
515 | #define bit_cpu_SSE4A (1u << 6) |
516 | #define bit_cpu_PREFETCHW (1u << 8) |
517 | #define bit_cpu_XOP (1u << 11) |
518 | #define bit_cpu_LWP (1u << 15) |
519 | #define bit_cpu_FMA4 (1u << 16) |
520 | #define bit_cpu_TBM (1u << 21) |
521 | |
522 | /* EDX. */ |
523 | #define bit_cpu_SYSCALL_SYSRET (1u << 11) |
524 | #define bit_cpu_NX (1u << 20) |
525 | #define bit_cpu_PAGE1GB (1u << 26) |
526 | #define bit_cpu_RDTSCP (1u << 27) |
527 | #define bit_cpu_LM (1u << 29) |
528 | |
529 | /* COMMON_CPUID_INDEX_D_ECX_1. */ |
530 | |
531 | /* EAX. */ |
532 | #define bit_cpu_XSAVEOPT (1u << 0) |
533 | #define bit_cpu_XSAVEC (1u << 1) |
534 | #define bit_cpu_XGETBV_ECX_1 (1u << 2) |
535 | #define bit_cpu_XSAVES (1u << 3) |
536 | |
537 | /* COMMON_CPUID_INDEX_80000007. */ |
538 | |
539 | /* EDX. */ |
540 | #define bit_cpu_INVARIANT_TSC (1u << 8) |
541 | |
542 | /* COMMON_CPUID_INDEX_80000008. */ |
543 | |
544 | /* EBX. */ |
545 | #define bit_cpu_WBNOINVD (1u << 9) |
546 | |
547 | /* COMMON_CPUID_INDEX_1. */ |
548 | |
549 | /* ECX. */ |
550 | #define index_cpu_SSE3 COMMON_CPUID_INDEX_1 |
551 | #define index_cpu_PCLMULQDQ COMMON_CPUID_INDEX_1 |
552 | #define index_cpu_DTES64 COMMON_CPUID_INDEX_1 |
553 | #define index_cpu_MONITOR COMMON_CPUID_INDEX_1 |
554 | #define index_cpu_DS_CPL COMMON_CPUID_INDEX_1 |
555 | #define index_cpu_VMX COMMON_CPUID_INDEX_1 |
556 | #define index_cpu_SMX COMMON_CPUID_INDEX_1 |
557 | #define index_cpu_EST COMMON_CPUID_INDEX_1 |
558 | #define index_cpu_TM2 COMMON_CPUID_INDEX_1 |
559 | #define index_cpu_SSSE3 COMMON_CPUID_INDEX_1 |
560 | #define index_cpu_CNXT_ID COMMON_CPUID_INDEX_1 |
561 | #define index_cpu_SDBG COMMON_CPUID_INDEX_1 |
562 | #define index_cpu_FMA COMMON_CPUID_INDEX_1 |
563 | #define index_cpu_CMPXCHG16B COMMON_CPUID_INDEX_1 |
564 | #define index_cpu_XTPRUPDCTRL COMMON_CPUID_INDEX_1 |
565 | #define index_cpu_PDCM COMMON_CPUID_INDEX_1 |
566 | #define index_cpu_PCID COMMON_CPUID_INDEX_1 |
567 | #define index_cpu_DCA COMMON_CPUID_INDEX_1 |
568 | #define index_cpu_SSE4_1 COMMON_CPUID_INDEX_1 |
569 | #define index_cpu_SSE4_2 COMMON_CPUID_INDEX_1 |
570 | #define index_cpu_X2APIC COMMON_CPUID_INDEX_1 |
571 | #define index_cpu_MOVBE COMMON_CPUID_INDEX_1 |
572 | #define index_cpu_POPCNT COMMON_CPUID_INDEX_1 |
573 | #define index_cpu_TSC_DEADLINE COMMON_CPUID_INDEX_1 |
574 | #define index_cpu_AES COMMON_CPUID_INDEX_1 |
575 | #define index_cpu_XSAVE COMMON_CPUID_INDEX_1 |
576 | #define index_cpu_OSXSAVE COMMON_CPUID_INDEX_1 |
577 | #define index_cpu_AVX COMMON_CPUID_INDEX_1 |
578 | #define index_cpu_F16C COMMON_CPUID_INDEX_1 |
579 | #define index_cpu_RDRAND COMMON_CPUID_INDEX_1 |
580 | |
581 | /* ECX. */ |
582 | #define index_cpu_FPU COMMON_CPUID_INDEX_1 |
583 | #define index_cpu_VME COMMON_CPUID_INDEX_1 |
584 | #define index_cpu_DE COMMON_CPUID_INDEX_1 |
585 | #define index_cpu_PSE COMMON_CPUID_INDEX_1 |
586 | #define index_cpu_TSC COMMON_CPUID_INDEX_1 |
587 | #define index_cpu_MSR COMMON_CPUID_INDEX_1 |
588 | #define index_cpu_PAE COMMON_CPUID_INDEX_1 |
589 | #define index_cpu_MCE COMMON_CPUID_INDEX_1 |
590 | #define index_cpu_CX8 COMMON_CPUID_INDEX_1 |
591 | #define index_cpu_APIC COMMON_CPUID_INDEX_1 |
592 | #define index_cpu_SEP COMMON_CPUID_INDEX_1 |
593 | #define index_cpu_MTRR COMMON_CPUID_INDEX_1 |
594 | #define index_cpu_PGE COMMON_CPUID_INDEX_1 |
595 | #define index_cpu_MCA COMMON_CPUID_INDEX_1 |
596 | #define index_cpu_CMOV COMMON_CPUID_INDEX_1 |
597 | #define index_cpu_PAT COMMON_CPUID_INDEX_1 |
598 | #define index_cpu_PSE_36 COMMON_CPUID_INDEX_1 |
599 | #define index_cpu_PSN COMMON_CPUID_INDEX_1 |
600 | #define index_cpu_CLFSH COMMON_CPUID_INDEX_1 |
601 | #define index_cpu_DS COMMON_CPUID_INDEX_1 |
602 | #define index_cpu_ACPI COMMON_CPUID_INDEX_1 |
603 | #define index_cpu_MMX COMMON_CPUID_INDEX_1 |
604 | #define index_cpu_FXSR COMMON_CPUID_INDEX_1 |
605 | #define index_cpu_SSE COMMON_CPUID_INDEX_1 |
606 | #define index_cpu_SSE2 COMMON_CPUID_INDEX_1 |
607 | #define index_cpu_SS COMMON_CPUID_INDEX_1 |
608 | #define index_cpu_HTT COMMON_CPUID_INDEX_1 |
609 | #define index_cpu_TM COMMON_CPUID_INDEX_1 |
610 | #define index_cpu_PBE COMMON_CPUID_INDEX_1 |
611 | |
612 | /* COMMON_CPUID_INDEX_7. */ |
613 | |
614 | /* EBX. */ |
615 | #define index_cpu_FSGSBASE COMMON_CPUID_INDEX_7 |
616 | #define index_cpu_TSC_ADJUST COMMON_CPUID_INDEX_7 |
617 | #define index_cpu_SGX COMMON_CPUID_INDEX_7 |
618 | #define index_cpu_BMI1 COMMON_CPUID_INDEX_7 |
619 | #define index_cpu_HLE COMMON_CPUID_INDEX_7 |
620 | #define index_cpu_AVX2 COMMON_CPUID_INDEX_7 |
621 | #define index_cpu_SMEP COMMON_CPUID_INDEX_7 |
622 | #define index_cpu_BMI2 COMMON_CPUID_INDEX_7 |
623 | #define index_cpu_ERMS COMMON_CPUID_INDEX_7 |
624 | #define index_cpu_INVPCID COMMON_CPUID_INDEX_7 |
625 | #define index_cpu_RTM COMMON_CPUID_INDEX_7 |
626 | #define index_cpu_PQM COMMON_CPUID_INDEX_7 |
627 | #define index_cpu_MPX COMMON_CPUID_INDEX_7 |
628 | #define index_cpu_PQE COMMON_CPUID_INDEX_7 |
629 | #define index_cpu_AVX512F COMMON_CPUID_INDEX_7 |
630 | #define index_cpu_AVX512DQ COMMON_CPUID_INDEX_7 |
631 | #define index_cpu_RDSEED COMMON_CPUID_INDEX_7 |
632 | #define index_cpu_ADX COMMON_CPUID_INDEX_7 |
633 | #define index_cpu_SMAP COMMON_CPUID_INDEX_7 |
634 | #define index_cpu_AVX512_IFMA COMMON_CPUID_INDEX_7 |
635 | #define index_cpu_CLFLUSHOPT COMMON_CPUID_INDEX_7 |
636 | #define index_cpu_CLWB COMMON_CPUID_INDEX_7 |
637 | #define index_cpu_TRACE COMMON_CPUID_INDEX_7 |
638 | #define index_cpu_AVX512PF COMMON_CPUID_INDEX_7 |
639 | #define index_cpu_AVX512ER COMMON_CPUID_INDEX_7 |
640 | #define index_cpu_AVX512CD COMMON_CPUID_INDEX_7 |
641 | #define index_cpu_SHA COMMON_CPUID_INDEX_7 |
642 | #define index_cpu_AVX512BW COMMON_CPUID_INDEX_7 |
643 | #define index_cpu_AVX512VL COMMON_CPUID_INDEX_7 |
644 | |
645 | /* ECX. */ |
646 | #define index_cpu_PREFETCHWT1 COMMON_CPUID_INDEX_7 |
647 | #define index_cpu_AVX512_VBMI COMMON_CPUID_INDEX_7 |
648 | #define index_cpu_UMIP COMMON_CPUID_INDEX_7 |
649 | #define index_cpu_PKU COMMON_CPUID_INDEX_7 |
650 | #define index_cpu_OSPKE COMMON_CPUID_INDEX_7 |
651 | #define index_cpu_WAITPKG COMMON_CPUID_INDEX_7 |
652 | #define index_cpu_AVX512_VBMI2 COMMON_CPUID_INDEX_7 |
653 | #define index_cpu_SHSTK COMMON_CPUID_INDEX_7 |
654 | #define index_cpu_GFNI COMMON_CPUID_INDEX_7 |
655 | #define index_cpu_VAES COMMON_CPUID_INDEX_7 |
656 | #define index_cpu_VPCLMULQDQ COMMON_CPUID_INDEX_7 |
657 | #define index_cpu_AVX512_VNNI COMMON_CPUID_INDEX_7 |
658 | #define index_cpu_AVX512_BITALG COMMON_CPUID_INDEX_7 |
659 | #define index_cpu_AVX512_VPOPCNTDQ COMMON_CPUID_INDEX_7 |
660 | #define index_cpu_RDPID COMMON_CPUID_INDEX_7 |
661 | #define index_cpu_CLDEMOTE COMMON_CPUID_INDEX_7 |
662 | #define index_cpu_MOVDIRI COMMON_CPUID_INDEX_7 |
663 | #define index_cpu_MOVDIR64B COMMON_CPUID_INDEX_7 |
664 | #define index_cpu_SGX_LC COMMON_CPUID_INDEX_7 |
665 | |
666 | /* EDX. */ |
667 | #define index_cpu_AVX512_4VNNIW COMMON_CPUID_INDEX_7 |
668 | #define index_cpu_AVX512_4FMAPS COMMON_CPUID_INDEX_7 |
669 | #define index_cpu_FSRM COMMON_CPUID_INDEX_7 |
670 | #define index_cpu_PCONFIG COMMON_CPUID_INDEX_7 |
671 | #define index_cpu_IBT COMMON_CPUID_INDEX_7 |
672 | #define index_cpu_IBRS_IBPB COMMON_CPUID_INDEX_7 |
673 | #define index_cpu_STIBP COMMON_CPUID_INDEX_7 |
674 | #define index_cpu_CAPABILITIES COMMON_CPUID_INDEX_7 |
675 | #define index_cpu_SSBD COMMON_CPUID_INDEX_7 |
676 | |
677 | /* COMMON_CPUID_INDEX_80000001. */ |
678 | |
679 | /* ECX. */ |
680 | #define index_cpu_LAHF64_SAHF64 COMMON_CPUID_INDEX_80000001 |
681 | #define index_cpu_SVM COMMON_CPUID_INDEX_80000001 |
682 | #define index_cpu_LZCNT COMMON_CPUID_INDEX_80000001 |
683 | #define index_cpu_SSE4A COMMON_CPUID_INDEX_80000001 |
684 | #define index_cpu_PREFETCHW COMMON_CPUID_INDEX_80000001 |
685 | #define index_cpu_XOP COMMON_CPUID_INDEX_80000001 |
686 | #define index_cpu_LWP COMMON_CPUID_INDEX_80000001 |
687 | #define index_cpu_FMA4 COMMON_CPUID_INDEX_80000001 |
688 | #define index_cpu_TBM COMMON_CPUID_INDEX_80000001 |
689 | |
690 | /* EDX. */ |
691 | #define index_cpu_SYSCALL_SYSRET COMMON_CPUID_INDEX_80000001 |
692 | #define index_cpu_NX COMMON_CPUID_INDEX_80000001 |
693 | #define index_cpu_PAGE1GB COMMON_CPUID_INDEX_80000001 |
694 | #define index_cpu_RDTSCP COMMON_CPUID_INDEX_80000001 |
695 | #define index_cpu_LM COMMON_CPUID_INDEX_80000001 |
696 | |
697 | /* COMMON_CPUID_INDEX_D_ECX_1. */ |
698 | |
699 | /* EAX. */ |
700 | #define index_cpu_XSAVEOPT COMMON_CPUID_INDEX_D_ECX_1 |
701 | #define index_cpu_XSAVEC COMMON_CPUID_INDEX_D_ECX_1 |
702 | #define index_cpu_XGETBV_ECX_1 COMMON_CPUID_INDEX_D_ECX_1 |
703 | #define index_cpu_XSAVES COMMON_CPUID_INDEX_D_ECX_1 |
704 | |
705 | /* COMMON_CPUID_INDEX_80000007. */ |
706 | |
707 | /* EDX. */ |
708 | #define index_cpu_INVARIANT_TSC COMMON_CPUID_INDEX_80000007 |
709 | |
710 | /* COMMON_CPUID_INDEX_80000008. */ |
711 | |
712 | /* EBX. */ |
713 | #define index_cpu_WBNOINVD COMMON_CPUID_INDEX_80000008 |
714 | |
715 | /* COMMON_CPUID_INDEX_1. */ |
716 | |
717 | /* ECX. */ |
718 | #define reg_SSE3 ecx |
719 | #define reg_PCLMULQDQ ecx |
720 | #define reg_DTES64 ecx |
721 | #define reg_MONITOR ecx |
722 | #define reg_DS_CPL ecx |
723 | #define reg_VMX ecx |
724 | #define reg_SMX ecx |
725 | #define reg_EST ecx |
726 | #define reg_TM2 ecx |
727 | #define reg_SSSE3 ecx |
728 | #define reg_CNXT_ID ecx |
729 | #define reg_SDBG ecx |
730 | #define reg_FMA ecx |
731 | #define reg_CMPXCHG16B ecx |
732 | #define reg_XTPRUPDCTRL ecx |
733 | #define reg_PDCM ecx |
734 | #define reg_PCID ecx |
735 | #define reg_DCA ecx |
736 | #define reg_SSE4_1 ecx |
737 | #define reg_SSE4_2 ecx |
738 | #define reg_X2APIC ecx |
739 | #define reg_MOVBE ecx |
740 | #define reg_POPCNT ecx |
741 | #define reg_TSC_DEADLINE ecx |
742 | #define reg_AES ecx |
743 | #define reg_XSAVE ecx |
744 | #define reg_OSXSAVE ecx |
745 | #define reg_AVX ecx |
746 | #define reg_F16C ecx |
747 | #define reg_RDRAND ecx |
748 | |
749 | /* EDX. */ |
750 | #define reg_FPU edx |
751 | #define reg_VME edx |
752 | #define reg_DE edx |
753 | #define reg_PSE edx |
754 | #define reg_TSC edx |
755 | #define reg_MSR edx |
756 | #define reg_PAE edx |
757 | #define reg_MCE edx |
758 | #define reg_CX8 edx |
759 | #define reg_APIC edx |
760 | #define reg_SEP edx |
761 | #define reg_MTRR edx |
762 | #define reg_PGE edx |
763 | #define reg_MCA edx |
764 | #define reg_CMOV edx |
765 | #define reg_PAT edx |
766 | #define reg_PSE_36 edx |
767 | #define reg_PSN edx |
768 | #define reg_CLFSH edx |
769 | #define reg_DS edx |
770 | #define reg_ACPI edx |
771 | #define reg_MMX edx |
772 | #define reg_FXSR edx |
773 | #define reg_SSE edx |
774 | #define reg_SSE2 edx |
775 | #define reg_SS edx |
776 | #define reg_HTT edx |
777 | #define reg_TM edx |
778 | #define reg_PBE edx |
779 | |
780 | /* COMMON_CPUID_INDEX_7. */ |
781 | |
782 | /* EBX. */ |
783 | #define reg_FSGSBASE ebx |
784 | #define reg_TSC_ADJUST ebx |
785 | #define reg_SGX ebx |
786 | #define reg_BMI1 ebx |
787 | #define reg_HLE ebx |
788 | #define reg_BMI2 ebx |
789 | #define reg_AVX2 ebx |
790 | #define reg_SMEP ebx |
791 | #define reg_ERMS ebx |
792 | #define reg_INVPCID ebx |
793 | #define reg_RTM ebx |
794 | #define reg_PQM ebx |
795 | #define reg_MPX ebx |
796 | #define reg_PQE ebx |
797 | #define reg_AVX512F ebx |
798 | #define reg_AVX512DQ ebx |
799 | #define reg_RDSEED ebx |
800 | #define reg_ADX ebx |
801 | #define reg_SMAP ebx |
802 | #define reg_AVX512_IFMA ebx |
803 | #define reg_CLFLUSHOPT ebx |
804 | #define reg_CLWB ebx |
805 | #define reg_TRACE ebx |
806 | #define reg_AVX512PF ebx |
807 | #define reg_AVX512ER ebx |
808 | #define reg_AVX512CD ebx |
809 | #define reg_SHA ebx |
810 | #define reg_AVX512BW ebx |
811 | #define reg_AVX512VL ebx |
812 | |
813 | /* ECX. */ |
814 | #define reg_PREFETCHWT1 ecx |
815 | #define reg_AVX512_VBMI ecx |
816 | #define reg_UMIP ecx |
817 | #define reg_PKU ecx |
818 | #define reg_OSPKE ecx |
819 | #define reg_WAITPKG ecx |
820 | #define reg_AVX512_VBMI2 ecx |
821 | #define reg_SHSTK ecx |
822 | #define reg_GFNI ecx |
823 | #define reg_VAES ecx |
824 | #define reg_VPCLMULQDQ ecx |
825 | #define reg_AVX512_VNNI ecx |
826 | #define reg_AVX512_BITALG ecx |
827 | #define reg_AVX512_VPOPCNTDQ ecx |
828 | #define reg_RDPID ecx |
829 | #define reg_CLDEMOTE ecx |
830 | #define reg_MOVDIRI ecx |
831 | #define reg_MOVDIR64B ecx |
832 | #define reg_SGX_LC ecx |
833 | |
834 | /* EDX. */ |
835 | #define reg_AVX512_4VNNIW edx |
836 | #define reg_AVX512_4FMAPS edx |
837 | #define reg_FSRM edx |
838 | #define reg_PCONFIG edx |
839 | #define reg_IBT edx |
840 | #define reg_IBRS_IBPB edx |
841 | #define reg_STIBP edx |
842 | #define reg_CAPABILITIES edx |
843 | #define reg_SSBD edx |
844 | |
845 | /* COMMON_CPUID_INDEX_80000001. */ |
846 | |
847 | /* ECX. */ |
848 | #define reg_LAHF64_SAHF64 ecx |
849 | #define reg_SVM ecx |
850 | #define reg_LZCNT ecx |
851 | #define reg_SSE4A ecx |
852 | #define reg_PREFETCHW ecx |
853 | #define reg_XOP ecx |
854 | #define reg_LWP ecx |
855 | #define reg_FMA4 ecx |
856 | #define reg_TBM ecx |
857 | |
858 | /* EDX. */ |
859 | #define reg_SYSCALL_SYSRET edx |
860 | #define reg_NX edx |
861 | #define reg_PAGE1GB edx |
862 | #define reg_RDTSCP edx |
863 | #define reg_LM edx |
864 | |
865 | /* COMMON_CPUID_INDEX_D_ECX_1. */ |
866 | |
867 | /* EAX. */ |
868 | #define reg_XSAVEOPT eax |
869 | #define reg_XSAVEC eax |
870 | #define reg_XGETBV_ECX_1 eax |
871 | #define reg_XSAVES eax |
872 | |
873 | /* COMMON_CPUID_INDEX_80000007. */ |
874 | |
875 | /* EDX. */ |
876 | #define reg_INVARIANT_TSC edx |
877 | |
878 | /* COMMON_CPUID_INDEX_80000008. */ |
879 | |
880 | /* EBX. */ |
881 | #define reg_WBNOINVD ebx |
882 | |
883 | /* FEATURE_INDEX_2. */ |
884 | #define bit_arch_I586 (1u << 0) |
885 | #define bit_arch_I686 (1u << 1) |
886 | #define bit_arch_Fast_Rep_String (1u << 2) |
887 | #define bit_arch_Fast_Copy_Backward (1u << 3) |
888 | #define bit_arch_Fast_Unaligned_Load (1u << 4) |
889 | #define bit_arch_Fast_Unaligned_Copy (1u << 5) |
890 | #define bit_arch_Slow_BSF (1u << 6) |
891 | #define bit_arch_Slow_SSE4_2 (1u << 7) |
892 | #define bit_arch_AVX_Fast_Unaligned_Load (1u << 8) |
893 | #define bit_arch_Prefer_MAP_32BIT_EXEC (1u << 9) |
894 | #define bit_arch_Prefer_PMINUB_for_stringop (1u << 10) |
895 | #define bit_arch_Prefer_No_VZEROUPPER (1u << 11) |
896 | #define bit_arch_Prefer_ERMS (1u << 12) |
897 | #define bit_arch_Prefer_FSRM (1u << 13) |
898 | #define bit_arch_Prefer_No_AVX512 (1u << 14) |
899 | #define bit_arch_MathVec_Prefer_No_AVX512 (1u << 15) |
900 | |
901 | #define index_arch_Fast_Rep_String FEATURE_INDEX_2 |
902 | #define index_arch_Fast_Copy_Backward FEATURE_INDEX_2 |
903 | #define index_arch_Slow_BSF FEATURE_INDEX_2 |
904 | #define index_arch_Fast_Unaligned_Load FEATURE_INDEX_2 |
905 | #define index_arch_Prefer_PMINUB_for_stringop FEATURE_INDEX_2 |
906 | #define index_arch_Fast_Unaligned_Copy FEATURE_INDEX_2 |
907 | #define index_arch_I586 FEATURE_INDEX_2 |
908 | #define index_arch_I686 FEATURE_INDEX_2 |
909 | #define index_arch_Slow_SSE4_2 FEATURE_INDEX_2 |
910 | #define index_arch_AVX_Fast_Unaligned_Load FEATURE_INDEX_2 |
911 | #define index_arch_Prefer_MAP_32BIT_EXEC FEATURE_INDEX_2 |
912 | #define index_arch_Prefer_No_VZEROUPPER FEATURE_INDEX_2 |
913 | #define index_arch_Prefer_ERMS FEATURE_INDEX_2 |
914 | #define index_arch_Prefer_No_AVX512 FEATURE_INDEX_2 |
915 | #define index_arch_MathVec_Prefer_No_AVX512 FEATURE_INDEX_2 |
916 | #define index_arch_Prefer_FSRM FEATURE_INDEX_2 |
917 | |
918 | /* XCR0 Feature flags. */ |
919 | #define bit_XMM_state (1u << 1) |
920 | #define bit_YMM_state (1u << 2) |
921 | #define bit_Opmask_state (1u << 5) |
922 | #define bit_ZMM0_15_state (1u << 6) |
923 | #define bit_ZMM16_31_state (1u << 7) |
924 | |
925 | # if defined (_LIBC) && !IS_IN (nonlib) |
926 | /* Unused for x86. */ |
927 | # define INIT_ARCH() |
928 | # define __get_cpu_features() (&GLRO(dl_x86_cpu_features)) |
929 | # define x86_get_cpuid_registers(i) \ |
930 | (&(GLRO(dl_x86_cpu_features).cpuid[i])) |
931 | # endif |
932 | |
933 | #ifdef __x86_64__ |
934 | # define HAS_CPUID 1 |
935 | #elif (defined __i586__ || defined __pentium__ \ |
936 | || defined __geode__ || defined __k6__) |
937 | # define HAS_CPUID 1 |
938 | # define HAS_I586 1 |
939 | # define HAS_I686 HAS_ARCH_FEATURE (I686) |
940 | #elif defined __i486__ |
941 | # define HAS_CPUID 0 |
942 | # define HAS_I586 HAS_ARCH_FEATURE (I586) |
943 | # define HAS_I686 HAS_ARCH_FEATURE (I686) |
944 | #else |
945 | # define HAS_CPUID 1 |
946 | # define HAS_I586 1 |
947 | # define HAS_I686 1 |
948 | #endif |
949 | |
950 | #endif /* cpu_features_h */ |
951 | |