1 | /* This file is part of the GNU C Library. |
2 | Copyright (C) 2008-2018 Free Software Foundation, Inc. |
3 | |
4 | The GNU C Library is free software; you can redistribute it and/or |
5 | modify it under the terms of the GNU Lesser General Public |
6 | License as published by the Free Software Foundation; either |
7 | version 2.1 of the License, or (at your option) any later version. |
8 | |
9 | The GNU C Library is distributed in the hope that it will be useful, |
10 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
11 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
12 | Lesser General Public License for more details. |
13 | |
14 | You should have received a copy of the GNU Lesser General Public |
15 | License along with the GNU C Library; if not, see |
16 | <http://www.gnu.org/licenses/>. */ |
17 | |
18 | #ifndef cpu_features_h |
19 | #define cpu_features_h |
20 | |
21 | #define bit_arch_Fast_Rep_String (1 << 0) |
22 | #define bit_arch_Fast_Copy_Backward (1 << 1) |
23 | #define bit_arch_Slow_BSF (1 << 2) |
24 | #define bit_arch_Fast_Unaligned_Load (1 << 4) |
25 | #define bit_arch_Prefer_PMINUB_for_stringop (1 << 5) |
26 | #define bit_arch_AVX_Usable (1 << 6) |
27 | #define bit_arch_FMA_Usable (1 << 7) |
28 | #define bit_arch_FMA4_Usable (1 << 8) |
29 | #define bit_arch_Slow_SSE4_2 (1 << 9) |
30 | #define bit_arch_AVX2_Usable (1 << 10) |
31 | #define bit_arch_AVX_Fast_Unaligned_Load (1 << 11) |
32 | #define bit_arch_AVX512F_Usable (1 << 12) |
33 | #define bit_arch_AVX512DQ_Usable (1 << 13) |
34 | #define bit_arch_I586 (1 << 14) |
35 | #define bit_arch_I686 (1 << 15) |
36 | #define bit_arch_Prefer_MAP_32BIT_EXEC (1 << 16) |
37 | #define bit_arch_Prefer_No_VZEROUPPER (1 << 17) |
38 | #define bit_arch_Fast_Unaligned_Copy (1 << 18) |
39 | #define bit_arch_Prefer_ERMS (1 << 19) |
40 | #define bit_arch_Prefer_No_AVX512 (1 << 20) |
41 | #define bit_arch_MathVec_Prefer_No_AVX512 (1 << 21) |
42 | #define bit_arch_XSAVEC_Usable (1 << 22) |
43 | #define bit_arch_Prefer_FSRM (1 << 23) |
44 | |
45 | /* CPUID Feature flags. */ |
46 | |
47 | /* COMMON_CPUID_INDEX_1. */ |
48 | #define bit_cpu_CX8 (1 << 8) |
49 | #define bit_cpu_CMOV (1 << 15) |
50 | #define bit_cpu_SSE (1 << 25) |
51 | #define bit_cpu_SSE2 (1 << 26) |
52 | #define bit_cpu_SSSE3 (1 << 9) |
53 | #define bit_cpu_SSE4_1 (1 << 19) |
54 | #define bit_cpu_SSE4_2 (1 << 20) |
55 | #define bit_cpu_OSXSAVE (1 << 27) |
56 | #define bit_cpu_AVX (1 << 28) |
57 | #define bit_cpu_POPCOUNT (1 << 23) |
58 | #define bit_cpu_FMA (1 << 12) |
59 | #define bit_cpu_FMA4 (1 << 16) |
60 | #define bit_cpu_HTT (1 << 28) |
61 | #define bit_cpu_LZCNT (1 << 5) |
62 | #define bit_cpu_MOVBE (1 << 22) |
63 | #define bit_cpu_POPCNT (1 << 23) |
64 | |
65 | /* COMMON_CPUID_INDEX_7. */ |
66 | #define bit_cpu_BMI1 (1 << 3) |
67 | #define bit_cpu_BMI2 (1 << 8) |
68 | #define bit_cpu_ERMS (1 << 9) |
69 | #define bit_cpu_RTM (1 << 11) |
70 | #define bit_cpu_AVX2 (1 << 5) |
71 | #define bit_cpu_AVX512F (1 << 16) |
72 | #define bit_cpu_AVX512DQ (1 << 17) |
73 | #define bit_cpu_AVX512PF (1 << 26) |
74 | #define bit_cpu_AVX512ER (1 << 27) |
75 | #define bit_cpu_AVX512CD (1 << 28) |
76 | #define bit_cpu_AVX512BW (1 << 30) |
77 | #define bit_cpu_AVX512VL (1u << 31) |
78 | #define bit_cpu_IBT (1u << 20) |
79 | #define bit_cpu_SHSTK (1u << 7) |
80 | #define bit_cpu_FSRM (1 << 4) |
81 | |
82 | /* XCR0 Feature flags. */ |
83 | #define bit_XMM_state (1 << 1) |
84 | #define bit_YMM_state (1 << 2) |
85 | #define bit_Opmask_state (1 << 5) |
86 | #define bit_ZMM0_15_state (1 << 6) |
87 | #define bit_ZMM16_31_state (1 << 7) |
88 | |
89 | /* The integer bit array index for the first set of internal feature bits. */ |
90 | #define FEATURE_INDEX_1 0 |
91 | |
92 | /* The current maximum size of the feature integer bit array. */ |
93 | #define FEATURE_INDEX_MAX 1 |
94 | |
95 | /* Offset for fxsave/xsave area used by _dl_runtime_resolve. Also need |
96 | space to preserve RCX, RDX, RSI, RDI, R8, R9 and RAX. It must be |
97 | aligned to 16 bytes for fxsave and 64 bytes for xsave. */ |
98 | #define STATE_SAVE_OFFSET (8 * 7 + 8) |
99 | |
100 | /* Save SSE, AVX, AVX512, mask and bound registers. */ |
101 | #define STATE_SAVE_MASK \ |
102 | ((1 << 1) | (1 << 2) | (1 << 3) | (1 << 5) | (1 << 6) | (1 << 7)) |
103 | |
104 | #ifdef __ASSEMBLER__ |
105 | # include <cpu-features-offsets.h> |
106 | #else /* __ASSEMBLER__ */ |
107 | enum |
108 | { |
109 | COMMON_CPUID_INDEX_1 = 0, |
110 | COMMON_CPUID_INDEX_7, |
111 | COMMON_CPUID_INDEX_80000001, |
112 | /* Keep the following line at the end. */ |
113 | COMMON_CPUID_INDEX_MAX |
114 | }; |
115 | |
116 | struct cpu_features |
117 | { |
118 | enum cpu_features_kind |
119 | { |
120 | arch_kind_unknown = 0, |
121 | arch_kind_intel, |
122 | arch_kind_amd, |
123 | arch_kind_other |
124 | } kind; |
125 | int max_cpuid; |
126 | struct cpuid_registers |
127 | { |
128 | unsigned int eax; |
129 | unsigned int ebx; |
130 | unsigned int ecx; |
131 | unsigned int edx; |
132 | } cpuid[COMMON_CPUID_INDEX_MAX]; |
133 | unsigned int family; |
134 | unsigned int model; |
135 | /* The state size for XSAVEC or XSAVE. The type must be unsigned long |
136 | int so that we use |
137 | |
138 | sub xsave_state_size_offset(%rip) %RSP_LP |
139 | |
140 | in _dl_runtime_resolve. */ |
141 | unsigned long int xsave_state_size; |
142 | /* The full state size for XSAVE when XSAVEC is disabled by |
143 | |
144 | GLIBC_TUNABLES=glibc.tune.hwcaps=-XSAVEC_Usable |
145 | */ |
146 | unsigned int xsave_state_full_size; |
147 | unsigned int feature[FEATURE_INDEX_MAX]; |
148 | /* Data cache size for use in memory and string routines, typically |
149 | L1 size. */ |
150 | unsigned long int data_cache_size; |
151 | /* Shared cache size for use in memory and string routines, typically |
152 | L2 or L3 size. */ |
153 | unsigned long int shared_cache_size; |
154 | /* Threshold to use non temporal store. */ |
155 | unsigned long int non_temporal_threshold; |
156 | }; |
157 | |
158 | /* Used from outside of glibc to get access to the CPU features |
159 | structure. */ |
160 | extern const struct cpu_features *__get_cpu_features (void) |
161 | __attribute__ ((const)); |
162 | |
163 | # if defined (_LIBC) && !IS_IN (nonlib) |
164 | /* Unused for x86. */ |
165 | # define INIT_ARCH() |
166 | # define __get_cpu_features() (&GLRO(dl_x86_cpu_features)) |
167 | # endif |
168 | |
169 | |
170 | /* Only used directly in cpu-features.c. */ |
171 | # define CPU_FEATURES_CPU_P(ptr, name) \ |
172 | ((ptr->cpuid[index_cpu_##name].reg_##name & (bit_cpu_##name)) != 0) |
173 | # define CPU_FEATURES_ARCH_P(ptr, name) \ |
174 | ((ptr->feature[index_arch_##name] & (bit_arch_##name)) != 0) |
175 | |
176 | /* HAS_* evaluates to true if we may use the feature at runtime. */ |
177 | # define HAS_CPU_FEATURE(name) \ |
178 | CPU_FEATURES_CPU_P (__get_cpu_features (), name) |
179 | # define HAS_ARCH_FEATURE(name) \ |
180 | CPU_FEATURES_ARCH_P (__get_cpu_features (), name) |
181 | |
182 | # define index_cpu_CX8 COMMON_CPUID_INDEX_1 |
183 | # define index_cpu_CMOV COMMON_CPUID_INDEX_1 |
184 | # define index_cpu_SSE COMMON_CPUID_INDEX_1 |
185 | # define index_cpu_SSE2 COMMON_CPUID_INDEX_1 |
186 | # define index_cpu_SSSE3 COMMON_CPUID_INDEX_1 |
187 | # define index_cpu_SSE4_1 COMMON_CPUID_INDEX_1 |
188 | # define index_cpu_SSE4_2 COMMON_CPUID_INDEX_1 |
189 | # define index_cpu_AVX COMMON_CPUID_INDEX_1 |
190 | # define index_cpu_AVX2 COMMON_CPUID_INDEX_7 |
191 | # define index_cpu_AVX512F COMMON_CPUID_INDEX_7 |
192 | # define index_cpu_AVX512DQ COMMON_CPUID_INDEX_7 |
193 | # define index_cpu_AVX512PF COMMON_CPUID_INDEX_7 |
194 | # define index_cpu_AVX512ER COMMON_CPUID_INDEX_7 |
195 | # define index_cpu_AVX512CD COMMON_CPUID_INDEX_7 |
196 | # define index_cpu_AVX512BW COMMON_CPUID_INDEX_7 |
197 | # define index_cpu_AVX512VL COMMON_CPUID_INDEX_7 |
198 | # define index_cpu_ERMS COMMON_CPUID_INDEX_7 |
199 | # define index_cpu_RTM COMMON_CPUID_INDEX_7 |
200 | # define index_cpu_FMA COMMON_CPUID_INDEX_1 |
201 | # define index_cpu_FMA4 COMMON_CPUID_INDEX_80000001 |
202 | # define index_cpu_POPCOUNT COMMON_CPUID_INDEX_1 |
203 | # define index_cpu_OSXSAVE COMMON_CPUID_INDEX_1 |
204 | # define index_cpu_HTT COMMON_CPUID_INDEX_1 |
205 | # define index_cpu_BMI1 COMMON_CPUID_INDEX_7 |
206 | # define index_cpu_BMI2 COMMON_CPUID_INDEX_7 |
207 | # define index_cpu_LZCNT COMMON_CPUID_INDEX_80000001 |
208 | # define index_cpu_MOVBE COMMON_CPUID_INDEX_1 |
209 | # define index_cpu_POPCNT COMMON_CPUID_INDEX_1 |
210 | # define index_cpu_IBT COMMON_CPUID_INDEX_7 |
211 | # define index_cpu_SHSTK COMMON_CPUID_INDEX_7 |
212 | # define index_cpu_FSRM COMMON_CPUID_INDEX_7 |
213 | |
214 | # define reg_CX8 edx |
215 | # define reg_CMOV edx |
216 | # define reg_SSE edx |
217 | # define reg_SSE2 edx |
218 | # define reg_SSSE3 ecx |
219 | # define reg_SSE4_1 ecx |
220 | # define reg_SSE4_2 ecx |
221 | # define reg_AVX ecx |
222 | # define reg_AVX2 ebx |
223 | # define reg_AVX512F ebx |
224 | # define reg_AVX512DQ ebx |
225 | # define reg_AVX512PF ebx |
226 | # define reg_AVX512ER ebx |
227 | # define reg_AVX512CD ebx |
228 | # define reg_AVX512BW ebx |
229 | # define reg_AVX512VL ebx |
230 | # define reg_ERMS ebx |
231 | # define reg_RTM ebx |
232 | # define reg_FMA ecx |
233 | # define reg_FMA4 ecx |
234 | # define reg_POPCOUNT ecx |
235 | # define reg_OSXSAVE ecx |
236 | # define reg_HTT edx |
237 | # define reg_BMI1 ebx |
238 | # define reg_BMI2 ebx |
239 | # define reg_LZCNT ecx |
240 | # define reg_MOVBE ecx |
241 | # define reg_POPCNT ecx |
242 | # define reg_IBT edx |
243 | # define reg_SHSTK ecx |
244 | # define reg_FSRM edx |
245 | |
246 | # define index_arch_Fast_Rep_String FEATURE_INDEX_1 |
247 | # define index_arch_Fast_Copy_Backward FEATURE_INDEX_1 |
248 | # define index_arch_Slow_BSF FEATURE_INDEX_1 |
249 | # define index_arch_Fast_Unaligned_Load FEATURE_INDEX_1 |
250 | # define index_arch_Prefer_PMINUB_for_stringop FEATURE_INDEX_1 |
251 | # define index_arch_AVX_Usable FEATURE_INDEX_1 |
252 | # define index_arch_FMA_Usable FEATURE_INDEX_1 |
253 | # define index_arch_FMA4_Usable FEATURE_INDEX_1 |
254 | # define index_arch_Slow_SSE4_2 FEATURE_INDEX_1 |
255 | # define index_arch_AVX2_Usable FEATURE_INDEX_1 |
256 | # define index_arch_AVX_Fast_Unaligned_Load FEATURE_INDEX_1 |
257 | # define index_arch_AVX512F_Usable FEATURE_INDEX_1 |
258 | # define index_arch_AVX512DQ_Usable FEATURE_INDEX_1 |
259 | # define index_arch_I586 FEATURE_INDEX_1 |
260 | # define index_arch_I686 FEATURE_INDEX_1 |
261 | # define index_arch_Prefer_MAP_32BIT_EXEC FEATURE_INDEX_1 |
262 | # define index_arch_Prefer_No_VZEROUPPER FEATURE_INDEX_1 |
263 | # define index_arch_Fast_Unaligned_Copy FEATURE_INDEX_1 |
264 | # define index_arch_Prefer_ERMS FEATURE_INDEX_1 |
265 | # define index_arch_Prefer_No_AVX512 FEATURE_INDEX_1 |
266 | # define index_arch_MathVec_Prefer_No_AVX512 FEATURE_INDEX_1 |
267 | # define index_arch_XSAVEC_Usable FEATURE_INDEX_1 |
268 | # define index_arch_Prefer_FSRM FEATURE_INDEX_1 |
269 | |
270 | #endif /* !__ASSEMBLER__ */ |
271 | |
272 | #ifdef __x86_64__ |
273 | # define HAS_CPUID 1 |
274 | #elif defined __i586__ || defined __pentium__ |
275 | # define HAS_CPUID 1 |
276 | # define HAS_I586 1 |
277 | # define HAS_I686 HAS_ARCH_FEATURE (I686) |
278 | #elif (defined __i686__ || defined __pentiumpro__ \ |
279 | || defined __pentium4__ || defined __nocona__ \ |
280 | || defined __atom__ || defined __core2__ \ |
281 | || defined __corei7__ || defined __corei7_avx__ \ |
282 | || defined __core_avx2__ || defined __nehalem__ \ |
283 | || defined __sandybridge__ || defined __haswell__ \ |
284 | || defined __knl__ || defined __bonnell__ \ |
285 | || defined __silvermont__ \ |
286 | || defined __k6__ || defined __k8__ \ |
287 | || defined __athlon__ || defined __amdfam10__ \ |
288 | || defined __bdver1__ || defined __bdver2__ \ |
289 | || defined __bdver3__ || defined __bdver4__ \ |
290 | || defined __btver1__ || defined __btver2__) |
291 | # define HAS_CPUID 1 |
292 | # define HAS_I586 1 |
293 | # define HAS_I686 1 |
294 | #else |
295 | # define HAS_CPUID 0 |
296 | # define HAS_I586 HAS_ARCH_FEATURE (I586) |
297 | # define HAS_I686 HAS_ARCH_FEATURE (I686) |
298 | #endif |
299 | |
300 | #endif /* cpu_features_h */ |
301 | |